Field of the Invention
Embodiments disclosed herein generally relate to power amplifier matching circuits used for matching impedance and harmonic control in a device, such as a cellular phone.
Description of the Related Art
Cellular phones, such as mobile phones, have many desirable features that make everyday life easier. For instance, mobile phones can receive emails, text messages and other data for the end user to utilize. Additionally, the mobile phone can send emails, text messages and other data from the mobile phone. The mobile phone typically operates on a wireless network provided by any one of the various cell phone carriers. The data sent to and from the mobile phones require the mobile phone to operate at an increasing number of frequencies to support all of the components and antennas of the mobile phone.
Power amplifier output matching circuits may be used to change the nominal 50 ohm load impedance presented by the antenna to a lower impedance appropriate for operation of the power amplifier output stage. These output matching circuits operate over a fixed frequency band and the impedance the circuits present to the power amplifier is optimized for the operation type of the amplifier, such as high linearity or high efficiency.
FIG. 1 shows a schematic circuit diagram of a typical power amplifier output matching circuit 100. The circuit 100 has at least three inductors integrated into the power amplifier module substrate along with surface mount technology (SMT) capacitors to achieve the required impedance matching for efficient and linear operation of the power amplifier output stage. The circuit 100 works as an impedance matching network using a first section low pass network 101 and a second section low pass network 103. A typical desired load impedance for the power amplifier output stage is about 3 ohms. The first section low pass network 101 increases the load impedance by about 500% by ratio, typically increasing the impedance from about 3 ohms to about 15 ohms. The second section low pass network 103 further increases the impedance from about 15 ohms to about 50 ohms, which is the typical nominal system impedance in which the power amplifier must operate.
The circuit 100 has several drawbacks. One major drawback is the fixed impedance ratio and fixed center frequency, as the substrate inductors and SMT capacitors have fixed values. The circuit 100 is also limited in both bandwidth and insertion loss characteristics, as these parameters are traded-off in design optimization. The circuit 100 is also large in physical size due to the need for SMT capacitors taking up space on the substrate surface. Additionally, the circuit 100 may need to include a fixed matching network between the power amplifier and any duplexers required for frequency division duplex (FDD) system operation. This network matches the duplexer impedance to the load impedance of the power amplifier. One drawback of this method is that the fixed network cannot optimally match the power amplifier and duplexer over a wide bandwidth for typical duplexers with a wide range of impedance values versus frequency. The fixed network additionally cannot optimally match the power amplifier versus varying supply voltages applied to the power amplifier for system efficiency optimization. The fixed network is experimentally determined for each power amplifier/duplexer combination, making bring-up of new phone platforms a slow and tedious process. The network also requires several SMT inductors and/or capacitors, and takes up significant phone board space for each duplexer.
Therefore, there is a need for an improved power amplifier matching circuit functioning as an impedance matching network that allows the impedance to be dynamically adjusted to compensate for variations in system parameters such as transmit center frequency, supply voltage, and duplexer load impedance versus frequency.